Yatrik
Digital Design Engineer
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Work experience
Digital Design Engineer
Western Semiconductor2026.01-Current(4 months)• Contributing to the architecture and RTL design of a RISC-V Vector Processor (V-extension), focusing on SIMD-style integer and floating-point computation. • Defining a scalable multi-stage vector pipeline with configurable vector lengths and execution lanes in collaboration with senior design engineers.Senior Research Associate
Illinois Institute of Technology2024.01-Current(2 years)• Designing and training a PointNet architecture for real-time road segmentation using LiDAR-camera fusion and deploying it on FPGA and GPU for autonomous vehicle applications. • Achieved 22% reduction in power consumption through optimized CNN accelerator design on FPGA. • Implemented Tiny YOLOv4 for real-time object detection with 33% power savings using advanced clock gating.
Projects
standard cell physical design flow - cadence innovus - 45nm pdk
Verification environment for First In First Out (FIFO)
Educational experience
Illinois Institute of Technology
Computer EngineeringGujarat Technological University
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