Michael

Senior Electrical Engineer
BeavertonNationality United States
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Summary

Extensive experience working as a hardware electrical engineer in the semiconductor industry. Primarily focused on implementation of analog and digital systems. I have been the technical lead of multiple teams creating a wide variety of systems and products. This includes working with mechanical designers, RFI designers, circuit designers, CAD designers, and production quality people to ensure each given system is optimized and delivered according to schedule. Owned and authored multiple industry leading specifications for computer-based components. Architected and designed validation platforms so these components could be properly validated and ensure they meet all specifications. Core Skills: digital and analog circuit design, embedded circuit design including high-level and low-level programming, Allegro Design Entry, Visual Studio, C/C++, Python, MATLAB, Simulink, Allegro Quartus, Xilinx ISE, Verilog, PSPICE, LTSpice, DFx.

Work experience

  • Senior Electrical Engineer

    Schneider Electric
    2019.10-Current(7 years)
    Senior Electrical Engineer working on active harmonic filters to deliver a flexible, high performance, cost-effective solution for stabilizing electrical networks by providing harmonic mitigation, power factor correction and load balancing.
  • Senior Electrical Engineer

    Intel Corporation
    2000.02-2019.04(19 years)
    Senior Hardware Electrical Engineer who has worked on multiple facts within the semiconductor industry from motherboard validation, silicon (CPU & SoC) validation, circuit design, platform architect, and specification owner. Thrives in a high-pressure and challenging work environment. • Selected to lead a program to integrate new spread spectrum capable MIPI camera sensors into clamshell-based systems. Drove the overall project resulting in an overall BOM cost savings of about $1 per camera module. • Owned the overall inclusion of power management flows into Intel-based desktop systems to meet the new California Energy Commission requirements, resulting in greater than 50% power savings. • Trained an international team of about 30 people on the development of Intel-based platforms. • Owned, authored, and developed multiple PMIC specifications. Worked closely with several 3rd party vendors, providing guidance that enabled them to design and fabricate new silicon components. • As the project lead, architected a PMIC validation environment. Led a cross-functional team of hardware and software engineers to design a microcontroller and FPGA based debug board with a host-based Windows GUI application. • Lead hardware engineer designing multiple circuits into reference platforms intended to implement newly enabled features, and validate new Intel products. Performed all schematic capture input, directed CAD activities, and participated in DFx reviews. • As the clock owner, responsible for working with external clock vendors to enable clock drivers/synthesizers. Authored multiple specifications detailing all of the requirements for new devices. • Created and drove validation test plans for desktop motherboard products, including new test suites, and specific plans for unique subsystems. • Wrote a new C/C++ based program which automated Excel and JMP to parse multiple files, reducing the time spent analyzing data from several days to less than 30 minutes. Show less

Educational experience

  • University of Portland

    Bachelor of Science (BS), Electrical and Electronics Engineering
    Graduated with Honors
  • Oregon Health and Science University

    Master of Engineering (MEng), Electrical and Electronics Engineering
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