Work experience

• Associate Analog Designer

  AMD (Xilinx), USA

  2025.01-Current

  (a year)

  • Designed op-amps, LDOs, and bias circuits for FPGA power subsystems using Cadence Virtuoso, meeting noise, gain, stability targets across PVT corners with 12% margin. • Ran AC, DC, transient, and noise simulations to identify risks early, reducing design rework 25% and improving first-pass silicon readiness across assigned analog blocks. • Created analog layouts with matching, shielding, and DRC/LVS checks, supporting tape-out readiness and reducing post-layout fixes 30% across sensitive signal routing tasks. • Built Python and TCL scripts for simulation sweeps and reporting, reducing characterization time 35% and improving verification coverage across multiple assigned analog design activities. • Supported silicon measurement correlation with pre-silicon models, identifying mismatch causes and contributing to design updates for high- speed interface circuits achieving 15% jitter improvement.
• Junior System Tester

  Intel, India

  2021.10-2023.08

  (2 years)

  • Executed analog and system-level testing for power and sensor circuits, achieving 96% validation coverage and reducing pre-release platform defects 30% through structured test execution. • Developed and ran test plans using oscilloscopes and signal generators, improving signal integrity issue detection 35% and reducing debug turnaround 25% across validation cycles. • Performed hardware debugging on analog subsystems, isolating voltage noise and stability failures, improving first-pass validation success 20% during CPU integration testing cycles. • Automated measurement and data capture routines, reducing manual lab effort 40%, improving test repeatability 45%, and accelerating defect identification during regression testing cycles. • Supported next-generation platform validation, verifying analog block interoperability under workload conditions, reducing late-stage silicon rework 15% and minimizing release risks.

Educational experience

• Drexel University, USA

  Computer Engineering

  2022.05-2025.05

  (3 years)
• Apollo Institute of Engineering and Technology, India

  Computer Engineering

  2019.09-2022.05

  (3 years)

Certificates